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Application Note 1036
Dropout Voltage
The ISL6411 features a typical 0.5 ? R DS(ON) P-channel
MOSFET pass transistors. This provides several
advantages over similar designs using PNP bipolar pass
transistors. The P-Channel MOSFET requires no base drive,
which reduces quiescent current considerably. PNP based
regulators waste considerable current in dropout when the
pass transistor saturates. They also use high base drive
currents under large loads. The ISL6411 does not suffer
180
160
140
120
100
80
60
40
from these problems and ultra low drop-out regulators to
maintain 2.84V supplies within regulation with worst case
minimum line input. Both LDO2 and LDO3 can supply full
20
0
-40
-15
10 35
60
85
load with less then 3.0V input. Figure below shows the
dropout voltage vs output load current for both LDO2 and
TEMPERATURE (°C)
FIGURE 9. LD02 DROPOUT VOLTAGE vs TEMPERATURE
LDO3.
100
0.140
0.120
0.100
0.080
0.060
0.040
0.020
90
80
70
60
50
40
30
20
10
0.000
0
-40
-10
25
85
0.00
0.05
0.10
0.15
I O (A)
0.20
0.25
0.30
TEMPERATURE (°C)
0.100
0.090
0.080
0.070
0.060
0.050
0.040
0.030
0.020
0.010
0.000
FIGURE 7. LD02 DROPOUT VOLTAGE
FIGURE 10. LD03 DROPOUT VOLTAGE vs TEMPERATURE
Current Limit
The ISL6411 monitors and controls the pass transistor’s
gate voltage to limit the output current. The current limit for
LDO1 is 550mA, LDO2 is 330mA and LDO3 is 250mA.
Performance in over current event can be tested by applying
over load on respective LDO outputs. The FAULT output will
go low for over current condition on any of the three LDO.
The ISL6411 based DC-DC converter is fully protected from
short circuit to ground outputs due to the current limit and
thermal protection features.
Integrated RESET for MAC/Baseband Processors
The ISL6411 includes a microprocessor supervisory circuit.
0.00
0.05
0.10
0.15
0.30
This circuit eliminates the extra RESET IC and external
I O (A)
FIGURE 8. LD03 DROPOUT VOLTAGE
components needed in wireless chipset applications. This
block performs a single function; it asserts a RESET signal
whenever the V IN supply voltage decreases below a preset
threshold 2.63V, keeping it asserted for a programmable
time (set by external capacitor CT) after the V IN pin voltage
has risen above the RESET threshold.
The push pull output stage of the reset circuit provides both
an active-Low RESET (P10) and an active-HIGH RESET
(P9) output. This function is guaranteed to be in the correct
3
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